[epineh]

Love your work man, I don't understand a lot of it but I am following it closely...keep it up

Russell.

[Episs]

thanks russell.
I am tryint to make this 3 axis motion controllel, and as it's not so simple electronic. I need some tools for viewing how motors are working and this is what i am making right now, becose without ability to see what is hapening in your electronic and check your PID or other code performance it is realy hard to make somthing good, for example I could esly write qickly some PID loop that will corect these missed steps,+ adjust motor speed but how will I know how good is this code working in real world, so here i will need some advanced tool that will colect information in real time working in parallel with main programm not consuming its resources, in simple mikrocontroller implement sutch systme would be imposible, but in fpga I can esly add aditional processor core that will colect this information and store it in onbord memory + will send information by RS232 to PC for vizualization

I just created my first x,y graphic test software, to make graphic you must write X,Y1,Y2 cordinates in that big textbox (all cordinates are saparated by space) and then click buton Data filter and software filters these cordinate walues and to werify if it filtered values corect I coded it to show small masagebox with all values it could extracted form textbox inserted data and then by clicking show chart button graphic is displayed
I created this software realy fast becouse I found graphic simple to use chart library caled ZedGraph and used its example code from http://www.codeproject.com + litle modifications - this text string decoding code for geting these x,y1,y2 values.
next I will try to write code for Rs232 port (I will try 0 modem conection -- computer will send information to itself (without real external hardware) and when it will work I will write code for fpga bord to send data to PC.
For Rs232 I will also try to use this Codeproject Code example.
here ar printscreen of my first software

and here is shematic picture of my self made instruction les mini processor(or state machine) IP-core that didn't showed in previous posts

[Episs]

now I finaly write some bsic test software for this RS323 comunication for PC, first i tryed codproject examples but they was for sending Text information through RS232, but I needed to send and recive binary information so i started to lern about binary data operations in visual C# and now I can send from PC binary data and recive this data and offcourse display recived numbers
now I have 2 separate sofwares one graphic and one Rs232 soft.
next thing I will make software for fpga bord to comunicate to PC and send some data for displeying.

[epineh]

Well between this thread and the FPGA4fun.com site, I am inspired to have a play with these things myself, though I think I will buy a MESA anything IO card, mainly as if my "expirements" fail I can use the existing EMC HAL drivers to use it.

FPGA's seem to be everywhere these days, I might as well jump on the bandwagon

Russell.

[Episs]

Thats true fpgas are evrywhere and becoming more popular I think reason is increasing performance and price reduction + availability and these cheep dev.kits for fast lerning and it is realy fan to play with theese chips they are like breadboard.
I think that fpgas are more prorogressing than microcontrollers + software tools are also geting better each year. so there is lot of activity in fpga field.

in past two weaks I tryed to make this rs232 code for fpga bord. There is already made UART logic free IP-core so I just need to write code for Nios II processor to comunicate and as i previously lerned to code this nios II with assembler language now i wanted to try code in C becose there are already made HAL drivers and comunication librarys (it will be mutch fasterand simpler than coding in ASM) but problem is that if i am using now C then I have to make this HAL driver for my Encoder peripheral so it will take some aditional time for HAL writing and then I will make some real test.

[holger]

Hi episs,
i have followed this threat as guest, now i am registered
and have a question to You. Want You to built a standalone system or
a controllerboard similar to mesaboard for a pc?

[Episs]

Want You to built a standalone system or
a controllerboard similar to mesaboard for a pc?

First I want to build something like mesabord with step/dir input For all axes and step/dir output to motor driver. and then if all will work I will think about stand alone solution.
Past month and now I am trying to make sinusoidal encoder + decoder with interpolator to get 10-32 micro steps (I hav 5 bit ADC so this 32 is max resolution).
here is picture of my test Encoder disk

and here is oscilloscope picture where is displayed how Atmega8 uses its ADC converter (307Ksps with 5bit resolution) and mega8 output voltage level change signal (red line) and blue line is 5bit DAC converter which shows ADC conversion results at this ( for DAC I soldered R/2R resistor Ladder).
also I tried to use atmegas8 comparator to make ADC converter using Analog serch algoritm like SAR. I got 500Ksps ADC but it took all atmega8 16Mips speed (no free clock cycles!) so it was bad idea.

I realized that atmega8 can decode one sin wave but encoder will have 2 sin waves (for rotation direction detection) and 2 sin waves mega8 cant handle (it is too slow) . Now my next crasy idea is to try make sin decoder on FPGA :idea:, as cyclone II fpga don't have on chip ADC converter then I am making 1-0.3Msps adc by resistor ladder DAC converter + Comparator. This self made ADC will work like regular SAR adc but with advanced serching algoritm (it will serc analog signal using LSB first and then to MSB(SAR serches from MSB to LSB, I alredy tested sutch serch algoritm in atmega8 using its on chip Compartor and max speed was 500ksps but it took all megas clock cycles (at 16Mhz) so no time is left for aditional code and processing.
Here is one link to page where is desribed how to make 5bit ADC using FPGA LVDS pins (I did't new they have internal comparators so my fpga hase hudge count of on chip comparators ) they get about 25Msps adc So now I will try to use internal fpga comparators to make this ADC converter.
http://www.bunniestudios.com/?page_id=12
When I will make this rotary Sin encoder I will print lines on paper and will make Linear encoder too (with some 0.1-0.05 mm resolution (digitaly interpolated (so one axis will have 2 encoders

Now it looks like I am making fpga motion controler with on bord Sin encoder decoder

[holger]

Thanks for the reply, i think this is a super project and i will follow this thread with interesse.
Have You think about a readout for a resolver? Most of the BDC i know have one build in for rotorposition.

[Episs]

Have You think about a readout for a resolver?

do you mean using some displays for position and speed ?? maybe later when I will have working motion controller then I could think about some displays.

past two weeks I was testing these LVDS pins and wrote some logic code for analog signal searching and it worked these LVDS pins have comparator with 100mv threshold voltage so with max 2.5V that LVDS pin can handle I could easily sense some 25 analog positions by 100mv steps . main problem I had with LVDS pin testing was this 2.5V power supply because I found that my cyclone II dev.kit had 3.3V power an all IO pins so I couldn't switch my dev.kit to 2.5V only was to test these pins was to use my self made FPGA board but there was problems too with power supply DC_DC converter and I burned one FPGA board because DC regulator ģenerated 5V for IO pins and 2.4V for Core voltage and that was too high for fpga. luckily I had second FPGA board where I corrected design mistakes PCB had and got this 2.5 VCCIO but now i had one more problem it was LTP port JTAG download cable who didn't worked on so low voltage level So I spend couple days now making this JTAG to work and in the end I needed to rise VCCIO to 2.7V (for 74hc244 buffer to convert 2.7V signals to 5V TTL for LTP port) and then I finally got working 2.7V fpga board and started to test these LVDS pins
here is picture of my board (with additional 5V DC-DC converter at top for JTAG programmer) and small test board where i soldered 5bit DAC converter + put some photo interrupter (I used it in encoder for sin wave )

here is test of LVPECL differential IO standard test read line is analog signal and blue line is DAC converter value that shows how logic searches this analog signal as I have oscilloscope of max 1Msps then I decreased fpga clock to 500Khz (SO I could see these search actions in oscilloscope)

the LVPECL is same differential signal as LVDS but with higher voltage level to 3.3V (I discovered it just few days ago) but problem with this standard is that my fpga has just 4 differential LVPECL pin pairs (at clock signal input) as I am already using 16Mhz clock the I have just 3 LCPECL pins left. main benefit of that LVPECL is its higher voltage level but with same 100mv threshold level comparator so now I could get 33 steps compared to 25 using LVDS +8 adc levels (not bad ) and I could use 3.3V on IO power supply as earlier.

I checked all alteras cyclone II and even III fpgas and all they have limited numbers of LVPECL I was disappointed and locked at other fpga vendor chips and found that lattice newest ECP2 fpga has LPECL standard on all differential IO's :wee: and they just started to offer these chips in online store and cheapest LFE2-6SE-5TN144C goes for ~15$ it has 6000 Lut and prices for lut count is same as my EP2C8 (20.3$ for more than 8000 Lut's)
except Luts ECP2 series fpgas has sysDSP blocks with MAC smallest LFE2-6 has 3 such DSP blocks total power was about ~3.5 GMACS so this chip has relay heavy DSP power. so I am now watching in this chip way for my next fpga Board that I will make (I just don't know when I will make it but soon I will need new fpga board with lot of self made ADC converters out of LVPECL pins
This FPGA differential IO capability's really amazed me especially LVPECL standard pins

[holger]

Hi Episs,
i didnt mean a display. Most brushless DC motors have assembled a resolver which give You the absolut rotorposition.If You want a sinus commutation for the motor You need the position of the rotor. One system use hall sensors, but with this system the motor can only block commutated. Another way is to use space vector PWM You can find a explanation here http://www.atmel.com/dyn/resources/p...ts/doc7671.pdf .But i think this way has its problems if the motorspeed is very low. A resolver give two DC voltages sinus and cosinus for the rotorposition. There are IC to translate this in a digital signal (8,12 and 16bit). But i think a fpga can handle this too.

[Episs]

Hi holger
I read that PDF and answer to this resolver question will be that I didn't thing about such resolvers because my stepper motors don't have them.

Now i will try to solder simple microsteping stepper motor driver form L298N dual H-bridge and will try to close the loop with my sin encoder
don't know how long it will take but when i will have some working driver i will post some photos

[holger]

Hi episs,
thanks for the information and good look with this bridge.

[Episs]

This week I soldered L298 dual H-bridge and today I made full-step logic with 50and 25% PWM chopping at 8Khz-2Khz frequency(for current limiting) and just tested and luckly motor was turning (at low speed).
I tested different chopping PWM duty cycles (just for testing).
next week I plan to add Opamp for current sense resistor voltage amplification and then will connect Output to Comparator + input to negative input i will connect 5 or 6 bit DAC and then I will try to make some microstepping logic and will make some tests
picture of my Fpga bord + l298 + stepper

and here is Logic vaveform simulation (there is my hard coded 25% PWM chopper)

[scubasteve_911]

Episs,

Looks like you have been doing a lot of work trying to get this thing up and running. I wanted to do an FPGA implementation of a 3-axis controller, but I was far too lazy and used a PIC-SERVO microcontroller from www.jrkerr.com , it works very well.

Let me see if I am getting you completely straight. You are planning on driving a stepper motor via an approximated two phase sine/cosine drive and then using feedback from incremental optical encoders to close a position loop. I would advise that 3-phase brushless motors would be best for this type of application because of the performance advantages.

I'm considering going this route soon after I finish some design work that I am currently working on. We can definitely collaborate and hopefully make a cheap solution for hobbiests. I have experience laying out FPGAs and programming them via embedded processors in C and through regular schematic logic. Features for such a project would be :

- using a cheap spartan 3 or equiv. for all three axes
- discrete fet drivers for high power servos
- programming the PID via RS232 and test movements
- accept step/dir signals to an appreciable rate
- a tight and fast servo rate

I actually need to create this by next may for my degree project (EE). I am planning on designing and fabricating a linear motor for CNC applications.

Steve

[jahonen]

Episs, why not add an average current controller (say, PI or PID) for each stepper phase, much more silent and current ripple goes to zero essentially. We have actually done this at work (although not with a FPGA), and I can say that it works beautifully. You can see the thing in action in this video (sorry about the poor quality, but you'll get the idea). The scope in the background shows the current of one stepper phase. It demonstrates the versatility of our DDS-based approach to the trajectory processing (not very good, as the thing doesn't change rotation direction). The whole trajectory with arbitrary velocity profile is just a bunch of acceleration values and interrupt counts. Then just change the reference values for each controller as you step along the microstep sine and cosine tables, and the motion is performed. Of course, that requires much more processing power (current control loops need to be performed preferably at each PWM cycle) than simpler peak current schemes with various decay methods but that should be of no problem with FPGA.

I have something similar lying on my hard drive around here. It is pretty much complete pure VHDL-design (no soft cores or C-code used) for the Altera EP2C8 which drives 4 motors with average current control (8 PID-controllers total), DDS drive profile player, 4 quadrature encoder interfaces. PWM modulator currently runs at 200 MHz (gives about 48 kHz PWM with 12 bit resolution). The rest of the logic runs at 50 MHz. The current measurement needs an external ADC, but for example the 12 bit 500 ksps National Semiconductor ADC128S102 is pretty cheap, budgetary price is about $3. Interface for the ADC is also already written, although I might change the ADC to something that can do simultaneous sampling, because I want to try the field oriented control methods in some time. I believe that is currently pretty much unexplored field for steppers, at least. The embedded multipliers come in handy when calculating the Park/inverse Park coordinate transforms.

I think that if I design the power stage properly, I might be able to run wide variety of other motors too, BLDC/AC, AC Servos, and perhaps including small ACIMs. For that, I need to evaluate the losses between IGBTs and MOSFETs. I don't aim for very high output currents, just something practical for small things, say 4-5 amps. Might be less with ACIM. It is also my aim to design the isolated full-bridge power supply (preferably software adjustable for different needs) for the thing with PFC in same board plus an ethernet interface for drive control, but that is an another story by itself.

You might ask why I am doing this, the answer is that the company whom I work for supports self-studying projects and I think this is an excellent one for the purpose. The purpose is to create something which can be used conveniently as a technology demoboard, so the cost is not very critical factor. Besides, I like how I can break free from sequential processing with VHDL and FPGA, and be able to do things simultaneously, and achieve ultimate realtime latency.

Regards,
Janne

[scubasteve_911]

Janne,

All I can say is that sounds excellent! Can you please share the code with us?? I'm dying to check it out!

Steve

[jahonen]

Janne,

All I can say is that sounds excellent! Can you please share the code with us?? I'm dying to check it out!

Steve

I think I can. Here are the VHDL-codes what I have so far written. There are also some Altera-specific macrofunctions (they can be easily recreated using Quartus macrofunction wizard) which are not included, such as 25 MHz -> 200 MHz PWM PLL, DDS sine-cosine-table "ROM" memory, DDS current multiplier, DDS trajectory FIFO and PID controller multiply-accumulate arithmetic macrofunctions. Comments are mostly nonexisting, and the code has not been real world tested, so there must be some nasty surprises lurking around.

Regards,
Janne

[Episs]

Tanks for code Janne, I just made quick look in to your code and it looks promising. Can't really say that it will work but I will try to dig in this week.
I noticed that you have coded encoder decoder in much different way than I did
I will test it and then will show results (witch core consumes less logic )

I have experience laying out FPGAs and programming them via embedded processors in C and through regular schematic logic.

Steve did you mean by programming fpgas via embaded processors in C.. that you can configure FPGA from some cheap microcontroller ?? like AVR,PIC ...

about choosing next fpga for this project (and next PCB) I am thinking of new cyclone III maybe some EP3C10 they should start to sell them in 2007 Q3, it will be cheapest fpga that money can buy.
next choice is actel Fusion and in latest actel news http://www.actel.com/company/press/2007/8/6/1
they say Actel AFS250 is available now, with prices starting at $7.50 in 100K volume, but currently I can't see it in Mouser online store it and its low volume price. This mixed signal fpga is obviously the best and most integrated solution (true all in one) for multi axis motor driver,controller.
I think after few months it will be more clear witch fpga, and other parts to chose for next PCB
about ADC converters then microchip has new pic24 (40mips) with 1.1Msps 10bit ADC for price ~2.5$low volium and 1.99$ in high volium so it looks like cheaper is to buy whole 16bit microcontroller with on chip ADC than single ADC
and they also have Dual ADC PIC24HJ64GP206 (18chanels) so total 2.2Msps for 4.87$
and i think that it is posible to owerclock PICs ADC converter to some 3.3Msps previously i owerclocked atmega8 ADC from regular 15Ksps to 150ksps (with 5bit resolution all was OK
how about owerclocking regular ADC converters for example take some 200Ksps ADC and owerclock it to 1msps sample rate (with decreased 4-5bit resolution) is it posible ??

[scubasteve_911]

Episs,

I have written C code for embedded microcontroller cores that reside in the FPGA itself, then used simple logical interfaces. I have not yet dabbled into VHDL code, but I am in the process of learning.

In regards to ADC selection, I have always opted to spend the extra cash and get a decent ADC and run them according to specification. I don't like the idea of mixed-signal programmable ICs since their performance can be less than desirable. For instance, I have done quite a bit of work with Cypress' PSoCs and their analog blocks are a joke

You can always use cheaper ADCs and multi-phase clocking to achieve the required bandwidth. I'm planning on starting this project soon after I complete my second machine build, which hopefully, will not give me too many headaches.

Regards,

Stephen

[Episs]

Stephen

are you familiar with Alteras Nios II processor ?? my plan was first to test these PID and other algorithms by nios II and then if it will be necessary to create some hardware accelerators in logic like PID.

about analog conversion then second way is to create ADC from comparator + DAC, previously I posted that I tested Fpga LVDS differential pins for use in analog signal measurement and all was OK except low resolution, and then I soldered ADC from LM339 and resistor 2R2 ladder DAC results was much better but main disadvantage was that all this circuit consumes lot of space and is more complicated than using ADC chip + special detection logic is needed but main advantage is low cost and high speed.
In next few days I will try to finish my stepper driver current measurement self made ADC and then hardware part will be finished and will start thinking about software